1. Field of the Invention
The present general inventive concept relates to a phase lock loop and a method for compensating a temperature thereof.
2. Background of the Related Art
A phase locked loop (hereinafter referred to as “PLL”) that generates a predetermined frequency from a reference frequency is widely used in various devices that generate a local oscillation frequency. The PLL includes a voltage controlled oscillator (hereinafter referred to as “VCO”) that further amplifies an input noise as a gain thereof increases. In order to overcome the disadvantage, a technology for the VCO includes a plurality of capacitors that carries out a coarse tuning and a capacitor that carries out a fine tuning. For instance, U.S. Pat. No. 6,587,005 titled “PLL CIRCUIT HAVING A VARIABLE OUTPUT FREQUENCY” by NEC Corporation discloses the technology. In accordance with U.S. Pat. No. 6,587,005, a VCO includes an active element forming a negative feedback, four capacitors controlled digitally to perform out a coarse tuning, and analog control of one capacitor (varactor) to perform a fine tuning. In addition, a frequency control unit outputs a digital value for the coarse tuning by receiving numbers N and R transmitted to an R-divider and an N-divider and a tuning voltage being outputted from a loop filter.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.